Altera5SGXEA7H3F35I3GFPGA
FPGA Stratix® V GXFamily 622000Cells 0.85V 1152-Pin FC-FBGA Tray
| Compliant | |
| 3A991 | |
| NRND | |
| 8542.31.00.60 | |
| SVHC | Yes |
| Automotive | No |
| PPAP | No |
| Stratix® V GX | |
| 28nm | |
| 552 | |
| 939000 | |
| 0.85 | |
| Utilize Memory | |
| 622000 | |
| 512 (18x18) | |
| SRAM | |
| 51200 | |
| 2560 | |
| 2 | |
| Viterbi Compiler, Low-Speed/Hybrid Serial Decoder|Sub-frame Latency JPEG 2000 Encoder (BA130)|SPAUI MAC|RLDRAM II Controller Core|RapidIO to AXI Bridge Controller (RAB) | |
| Altera/Barco Silex/Mobiveil, Inc/Commsonic | |
| 622000 | |
| 16 | |
| 28 | |
| 48 | |
| 14.1 | |
| 256 | |
| 4 | |
| Yes | |
| Yes | |
| No | |
| Yes | |
| 3 | |
| LVPECL|LVDS|HCSL | |
| LVCMOS|LVTTL | |
| DDR2 SDRAM|DDR3 SDRAM|RLDRAM II|RLDRAM III|QDRII+SRAM | |
| 0.82 | |
| 0.88 | |
| 1.2|1.25|1.35|1.5|1.8|2.5|3 | |
| -40 | |
| 100 | |
| Industrial | |
| Stratix | |
| Befestigung | Surface Mount |
| Verpackungshöhe | 2.9 |
| Verpackungsbreite | 35 |
| Verpackungslänge | 35 |
| Leiterplatte geändert | 1152 |
| Standard-Verpackungsname | BGA |
| Lieferantenverpackung | FC-FBGA |
| 1152 | |
| Leitungsform | Ball |
| EDA / CAD Models |
KI-Systeme in der Medizin
Design-Tipps, empfohlene Komponenten und KI-Insights für bessere Diagnose- und Therapiegeräte – im aktuellen Whitepaper.