AlteraEP2S90F1508C3FPGA
FPGA Stratix® IIFamily 90960Cells 816.99MHz 1.2V 1508-Pin FC-FBGA Tray
| Not Compliant | |
| 3A001a.7.a. | |
| Obsolete | |
| COMPONENTS | |
| SVHC | Yes |
| SVHC überschreitet Schwellenwert | Yes |
| Automotive | No |
| PPAP | No |
| Stratix® II | |
| 90nm | |
| 902 | |
| 8 | |
| Utilize Memory | |
| 1.2 | |
| 90960 | |
| 192 (18x18) | |
| SRAM | |
| 4414.5 | |
| 4+408+488 | |
| Viterbi Compiler, High-Speed Parallel Decoder|RapidIO to AXI Bridge Controller (RAB)|PowerPC/SH/1960 System Controller|32/64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz | |
| Altera/CAST, Inc/Barco Silex/Mobiveil, Inc/Eureka Technology Inc/PLDA | |
| 90960 | |
| 16 | |
| 12 | |
| 620(Typ) | |
| Yes | |
| 48 | |
| No | |
| No | |
| 8 | |
| No | |
| Yes | |
| 816.99 | |
| 3 | |
| LVDS|LVPECL | |
| LVTTL|CMOS|SSTL|HSTL | |
| 1Gbps | |
| RLDRAM II|QDRII+SRAM|DDR SDRAM|DDR2 SDRAM | |
| 1.15 | |
| 1.25 | |
| 1.2|1.5|1.8|2.5|3.3 | |
| 0 | |
| 85 | |
| Commercial | |
| Tray | |
| Stratix | |
| Befestigung | Surface Mount |
| Verpackungshöhe | 3(Max) |
| Verpackungsbreite | 40 |
| Verpackungslänge | 40 |
| Leiterplatte geändert | 1508 |
| Standard-Verpackungsname | BGA |
| Lieferantenverpackung | FC-FBGA |
| 1508 | |
| Leitungsform | Ball |
| EDA / CAD Models |
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