AlteraEP3SL200F1152C2GFPGA
FPGA Stratix® III LFamily 200000Cells 600MHz 1.1V 1152-Pin FBGA Tray
| Compliant | |
| 3A001.a.7.a | |
| NRND | |
| 8542.31.00.60 | |
| SVHC | Yes |
| Automotive | No |
| PPAP | No |
| Stratix® III L | |
| 65nm | |
| 744 | |
| 24 | |
| 1.1 | |
| Utilize Memory | |
| 200000 | |
| 576 (18x18) | |
| SRAM | |
| 10646 | |
| 36+468+4000 | |
| Sub-frame Latency JPEG 2000 Encoder (BA130)|RapidIO to AXI Bridge Controller (RAB)|EtherCAT|EtherNET/IP|DS1/E1 TDM over Packet IP core | |
| Barco Silex/Mobiveil, Inc | |
| 200000 | |
| 16 | |
| 12 | |
| No | |
| No | |
| Yes | |
| 600 | |
| No | |
| 2 | |
| LVPECL|LVDS | |
| LVTTL|LVCMOS | |
| DDR2 SDRAM|DDR3 SDRAM|RLDRAM II|QDRII+SRAM | |
| 1.05 | |
| 1.15 | |
| 1.2|1.5|1.8|2.5|3.3 | |
| 0 | |
| 85 | |
| Commercial | |
| Stratix | |
| Befestigung | Surface Mount |
| Verpackungshöhe | 2.88 |
| Verpackungsbreite | 35 |
| Verpackungslänge | 35 |
| Leiterplatte geändert | 1152 |
| Standard-Verpackungsname | BGA |
| Lieferantenverpackung | FBGA |
| 1152 | |
| Leitungsform | Ball |
| EDA / CAD Models |
KI-Systeme in der Medizin
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